Merge branch 'release/v0.1.0'

Author: jonathanpallant

.cargo/config

@@ -1,5 +1,2 @@
-[target.thumbv7em-none-eabihf]
-runner = 'arm-none-eabi-gdb --command=gdb.cfg -w'
-
 [build]
-target = "thumbv7em-none-eabihf"
+target = "thumbv6m-none-eabi"

.gitmodules

@@ -0,0 +1,4 @@
+{
+    "rust-analyzer.checkOnSave.allTargets": false,
+    "rust-analyzer.cargo.target": "thumbv6m-none-eabi"
+}

.vscode/settings.json

@@ -1,5 +1,5 @@
 [package]
-name = "neotron_os"
+name = "neotron-os"
 version = "0.1.0"
 authors = ["Jonathan 'theJPster' Pallant <github@thejpster.org.uk>"]
 edition = "2018"
@@ -9,7 +9,17 @@ readme = "README.md"
 repository = "https://github.com/neotron-compute/Neotron-OS"
 
 [[bin]]
-name = "neotron_os"
+name = "flash1002"
+test = false
+bench = false
+
+[[bin]]
+name = "flash0802"
+test = false
+bench = false
+
+[[bin]]
+name = "flash0002"
 test = false
 bench = false
 
@@ -20,7 +30,7 @@ codegen-units = 1
 opt-level = "s"
 
 [dependencies]
-neotron-common-bios = { path = "./common" }
+neotron-common-bios = "0.1.0"
 r0 = "1.0"
 postcard = "0.5"
 serde = { version = "1.0", default-features = false }

Cargo.toml

@@ -19,58 +19,38 @@ This OS is a work in progress. We intend to support:
 
 ## Build instructions
 
-Your board will need an appropriate Neotron BIOS installed, and you need to have OpenOCD running for your particular board. You also need to set the linker 
-arguments so you link the binary to suit the memory available on your system.
+Your board will need an appropriate Neotron BIOS installed, and you need to have
+OpenOCD or some other programming tool running for your particular board. See
+your BIOS instructions for more details.
 
-### Build Instructions for the Neotron Pico
+We compile one version of Neotron OS, but we link it three times to produce
+three binaries:
 
-The Neotron Pico has some special memory requirements - in particular, the
-flash lives at `0x1000_0000` and not `0x0000_0000`. There is 1920 KiB of
-flash, and 240 KiB of RAM available.
+* `flash0002` - is linked to run from address `0x0002_0000`
+* `flash1002` - is linked to run from address `0x1002_0000`
+* `flash0802` - is linked to run from address `0x0802_0000`
 
 ```
 $ git clone https://github.com/neotron-compute/Neotron-OS.git
 $ cd Neotron-OS
 $ git submodule update --init
-$ RUSTFLAGS="-C link-arg=-Tneotron-os-pico.ld" cargo build --release --target=thumbv6m-none-eabi
+$ cargo build --release
+$ ls ./target/thumbv6m-none-eabi/release/flash{10,08,00}02
+./target/thumbv6m-none-eabi/release/flash0002 ./target/thumbv6m-none-eabi/release/flash0802 ./target/thumbv6m-none-eabi/release/flash1002
 ```
 
-### Build Instructions for 256K RAM systems
-
-Systems which reserve the second 512 KiB of Flash and first 256 KiB of SRAM
-for the OS can use this linker script. These systems include the Neotron
-340ST.
-
-```
-$ git clone https://github.com/neotron-compute/Neotron-OS.git
-$ cd Neotron-OS
-$ git submodule update --init
-$ RUSTFLAGS="-C link-arg=-Tneotron-os-256k.ld" cargo run --release
-```
-
-### Build Instructions for 32K RAM systems
-
-Systems which reserve the second 128 KiB of Flash and first 26 KiB of SRAM for
-the OS can use this linker script. These systems include the Neotron 32.
-
-```
-$ git clone https://github.com/neotron-compute/Neotron-OS.git
-$ cd Neotron-OS
-$ git submodule update --init
-$ RUSTFLAGS="-C link-arg=-Tneotron-os-26k.ld" cargo run --release
-```
-
-TODO: Think of a better way of setting the memory limits for a particular OS build.
+Your BIOS should tell you which one you want and how to load it onto your system.
 
 ## Changelog
 
 ### Unreleased Changes ([Source](https://github.com/neotron-compute/Neotron-OS/tree/master))
 
 * Basic `println!` to the text buffer.
+* Re-arranged linker script setup
 
 ## Licence
 
-    Neotron-OS Copyright (c) The Neotron Developers, 2020
+    Neotron-OS Copyright (c) The Neotron Developers, 2022
 
     This program is free software: you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by

README.md

@@ -0,0 +1,22 @@
+fn main() {
+    println!("cargo:rustc-link-arg-bin=flash1002=-Tneotron-flash-1002.ld");
+    println!("cargo:rustc-link-arg-bin=flash0802=-Tneotron-flash-0802.ld");
+    println!("cargo:rustc-link-arg-bin=flash0002=-Tneotron-flash-0002.ld");
+
+    if let Ok(cmd_output) = std::process::Command::new("git")
+        .arg("describe")
+        .arg("--all")
+        .arg("--dirty")
+        .arg("--long")
+        .output()
+    {
+        let git_version = std::str::from_utf8(&cmd_output.stdout).unwrap();
+        println!(
+            "cargo:rustc-env=OS_VERSION={} (git:{})",
+            env!("CARGO_PKG_VERSION"),
+            git_version.trim()
+        );
+    } else {
+        println!("cargo:rustc-env=OS_VERSION={}", env!("CARGO_PKG_VERSION"));
+    }
+}

build.rs

@@ -21,14 +21,17 @@
 /* Provides information about the memory layout of the device */
 MEMORY
 {
-    /* The OS gets the top 128 KiB of Flash, leaving the first 128 KiB for the BIOS */
+    /* The first 128 KiB is for the BIOS. We get the rest. */
     FLASH (rx)  : ORIGIN = 0x00020000, LENGTH = 128K
-    /* The BIOS gets the top 6 KiB of SRAM (including the Stack), leaving 26 KiB for the OS (at 0x2000_0000 to 0x2000_67FF) */
-    RAM   (rwx) : ORIGIN = 0x20000000, LENGTH = 26K
+    /*
+     * We get the bottom 4KB of RAM. Anything above that is for applications
+     * (up to wherever the BIOS tells us we can use.)
+     */
+    RAM   (rwx) : ORIGIN = 0x20000000, LENGTH = 4K
 }
 
 /* # Entry point = what the BIOS calls to start the OS */
-ENTRY(entry_point);
+ENTRY(main);
 EXTERN(__RESET_VECTOR);
 
 /* # Sections */

common

@@ -21,18 +21,17 @@
 /* Provides information about the memory layout of the device */
 MEMORY
 {
-    /* The BIOS gets the first 512 KiB of Flash, leaving 512 KiB for the OS */
-    FLASH (rx)  : ORIGIN = 0x08080000, LENGTH = 512K
-    /* The BIOS gets the top 64 KiB of SRAM (including the Stack), leaving 256 KiB for the OS
-       (at 0x2000_0000 to 0x2003_FFFF). The RAM is actually split into three banks, but we can
-       largely ignore that.
-    */
-    RAM   (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
-    /* The SDRAM holds the LCD framebuffers */
+    /* The first 128 KiB is for the BIOS. We get the rest. */
+    FLASH (rx)  : ORIGIN = 0x08020000, LENGTH = 128K
+    /*
+     * We get the bottom 4KB of RAM. Anything above that is for applications
+     * (up to wherever the BIOS tells us we can use.)
+     */
+    RAM   (rwx) : ORIGIN = 0x20000000, LENGTH = 4K
 }
 
 /* # Entry point = what the BIOS calls to start the OS */
-ENTRY(entry_point);
+ENTRY(main);
 EXTERN(__RESET_VECTOR);
 
 /* # Sections */

neotron-os-26k.ld neotron-flash-0002.ldneotron-os-26k.ld renamed to neotron-flash-0002.ld

@@ -21,19 +21,17 @@
 /* Provides information about the memory layout of the device */
 MEMORY
 {
-    /* The BIOS gets the first 128 KiB of Flash, leaving 1920 KiB for the OS */
-    FLASH (rx)  : ORIGIN = 0x10020000, LENGTH = 0x1E0000
+    /* The first 128 KiB is for the BIOS. We get the rest. */
+    FLASH (rx)  : ORIGIN = 0x10020000, LENGTH = 128K
     /*
-     * The RP2040 has 256 KiB of SRAM striped across four banks (for high
-     * performance), plus a fifth bank containing another 8 KiB of RAM. The
-     * BIOS is at the top of the high-performance RAM. We get the lower part.
+     * We get the bottom 4KB of RAM. Anything above that is for applications
+     * (up to wherever the BIOS tells us we can use.)
      */
-    RAM   (rwx) : ORIGIN = 0x20000000, LENGTH = 0x3C000
-    /* The SDRAM holds the LCD framebuffers */
+    RAM   (rwx) : ORIGIN = 0x20000000, LENGTH = 4K
 }
 
 /* # Entry point = what the BIOS calls to start the OS */
-ENTRY(entry_point);
+ENTRY(main);
 EXTERN(__RESET_VECTOR);
 
 /* # Sections */